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Figure 31 · Dedicated JTAG Mode
You do not need to specify an internal pull-up resistor; SE II automatically configures TMS and TDI with
internal pull-up resistors.
Flexible JTAG Mode
When you do not select the “Reserve JTAG Pin” box, you place the FPGA in Flexible JTAG mode, where
TDI, TCK and TDO pins may function as user I/Os or JTAG pins. When you select Flexible JTAG mode, you
disable the internal pull-up resistors on the TMS and TDI pins. Note that you require an external 10K Ohm
pull-up resistor on the TMS pin in this mode (figure below). Silicon Explorer II transforms TDI, TCK and TDO
pins from user I/Os into JTAG diagnostic pins when a rising edge at TCK is detected while TMS is at logical
low. The JTAG pins revert to user I/Os when the JTAG state machine is in the Test-Logic reset state.
Figure 32 · Flexible JTAG Mode with 10K Pullup Resistor
The table below shows the possible configurations of the diagnostic pins.
Table 11 · Diagnostic Pin Configuration
Dedicated JTAG Mode
Flexible JTAG Mode
TCK, TDI, and TDO are dedicated Use TCK, TDI and TDO as I/O's. You need a 10K
diagnostic pins.
pull-up resistor on the TMS Pin.
Probe Pins
When you select the Reserve Probe Pin box, you direct the layout tool to reserve the PRA and PRB pins as
diagnostic pins. This option is merely a guideline. If the Layout tool requires that the PRA and PRB pins be
50
Silicon Explorer II User's Guide
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